Software Defined Radio VLOG Part 3 – Unintentional Resonate Circuit

1. 

   Jeri Ellsworth says:

   April 19, 2014 at 1:30 AM

   @FlyByPC FPGA is now generating the local oscilator. I’ll have more now
   with it’s internal PLL.

   Reply
2. 

   vk2zay says:

   April 19, 2014 at 12:45 AM

   The opposite sideband suppression looks pretty good judging by that
   moderately strong CW signal close-in. RC filtering is often way better at
   RF than ferrites, doesn’t give odd resonances except for capacitor
   weirdness, the resistance de-Qs any resonances.

   Reply
3. 

   Jac Goudsmit says:

   April 19, 2014 at 12:20 AM

   Wow. Amazing! With problems like that, all I would be able to do is put my
   fingers in my ears and go “LALALALALA I CAN’T HEAR YOU, HARMONICS”. 😉

   Reply
4. 

   w2aew says:

   April 18, 2014 at 11:38 PM

   I’ve done a lot of debugging tricky circuits by literally using my fingers
   to drop in a bit of capacitance or RF loss into a circuit to try to find
   sensitive nodes or oscillating circuits (or overheating parts – ouch!).
   Good stuff! What SDR software are you using again?

   Reply
5. 

   whisk0r says:

   April 18, 2014 at 11:36 PM

   A random capacitor or a resistor to ground does seem to usually do the
   trick for warding off many of these little gremlins! tymkrs

   Reply
6. 

   mikeselectricstuff says:

   April 18, 2014 at 11:34 PM

   @Afrotechmods Fine until you spend ages wondering why things have suddenly
   changed before you realise it’s because the battery is going flat…

   Reply
7. 

   Jeri Ellsworth says:

   April 18, 2014 at 10:54 PM

   @vk2zay I’ll have to play with the circuit a bit. I was trying to squelch
   high frequency noise coming from the 74hc74, since it has very fast rise
   times. I even series terminated the select lines to the 4066, which seemed
   to help.

   Reply
8. 

   mikeselectricstuff says:

   April 18, 2014 at 10:50 PM

   @FlyByPC There is no such thing as digital . Everything is analogue. Even
   in something as ‘digital as an FPGA you can get marginal timings…
   metastability… decoupling problems…

   Reply
9. 

   Christopher Gosnell says:

   April 18, 2014 at 9:55 PM

   I agree with FLyByPC, you ignore analog(ue) effects in digital circuits at
   your peril…

   Reply
10. 

    Jeri Ellsworth says:

    April 18, 2014 at 9:41 PM

    @w2aew Software – Winrad is a freeware SDR tool I found.

    Reply
11. 

    Jeri Ellsworth says:

    April 18, 2014 at 8:42 PM

    @markiduval Hah. “Jack and Jill went up the hill to fetch a bucket of
    capacitors…”

    Reply
12. 

    Afrotechmods says:

    April 18, 2014 at 8:21 PM

    If you are not already doing so, may I suggest you use a battery to power
    these initial prototypes? That way you are guaranteed minimal power supply
    noise. Once everything is going well you can go back and tweak it for any
    source you want.

    Reply
13. 

    M. Eric Carr says:

    April 18, 2014 at 7:46 PM

    This is why I prefer digital. With analog, it seems that there are so many
    ways that the circuit could decide to do something else that it’s hard to
    know where to start. Nice job tracking it down, though. It looks like the
    TTL oscillators are out (or maybe they’re just hard to see from this angle)
    — is the FPGA running the show now?

    Reply

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